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MPSOC中的ISS与SYSTEMC模型集成

Integration of ISS and SYSTEMC Model in the Multi-Processor SOC
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摘要 目前在SOC设计中基于C/C++的硬件设计方法已经比较普遍,特别是使用SYSTEMC作为硬件建模语言,指令集仿真器(ISS)作为处理器模型的方式,对SOC的开发非常有效。但随着应用程序规模的增加,我们需要在系统中嵌入多个核,构成多核系统(MPSOC),以满足性能的要求。本文首先对单核系统中的ISS和硬件模块的集成方法进行分析,然后将其引入到MPSOC的开发平台的设计中,并对其效果进行验证。 At present the method of hardware design based on C/C++ has been quite universal in the SOC design, in particular the way which takes SYSTEMC as the hardware modeling language and takes Instruction Set Simulator (ISS) as a model of the processor, is extremely effective to the development of the SOC. However, as the increase of the scale in the application, we need to embed several cores to meet requirements of the performance in the system. This paper first analyzes the method of integration which relates to ISS and hardware in the system with single core, then the method is introduced into the development of Multi-Processor SOC(MPSOC), verifying the effect of the method.
机构地区 合肥工业大学
出处 《中国集成电路》 2007年第6期28-31,共4页 China lntegrated Circuit
关键词 MPSOC ISS SYSTEMC MPSOC ISS SYSTEMC
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参考文献6

  • 1[1]Ahmed Amine Jerraya,Wayne Wolf,"Multiprocessor Systems-on-Chips[M]",Morgan Kaufmann Publishers Inc.San Francisco,PP.1-18,2005.
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