期刊文献+

数字信号处理IP的层次化设计与验证 被引量:3

Hierarchical Design and Verification of Digital Signal Processing IP
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摘要 对数字信号处理IP设计流程各个阶段的设计和验证的任务和目标进行了一般性探讨,提出了一种层次化的数字信号处理IP的设计、验证流程,并且给出设计实例。该流程的设计阶段包括理论算法设计、需求设定、定点算法设计和验证、电路接口和时序设计以及算法/软件/硬件协同验证,采用该流程能够有效地提高数字信号处理IP的设计和验证的效率。 The design and verification objective of each stage in digital signal processing IP design were analyzed. A hierarchical design/verification flow for digital signal processing IP were introduced, and the design example was presented. The design flow includs choosing algorithm, making specification, fixed point algorithm design and verification, signal definition and algorithm/software/hardware co-verification, and it can effectively prompt the efficiency of the design and verification of digital signal processing IP.
出处 《半导体技术》 CAS CSCD 北大核心 2007年第7期614-617,628,共5页 Semiconductor Technology
基金 国家863计划资助项目(2002AA11901015)
关键词 数字信号处理 层次化 IP 定点模型 比特精确 digital signal processing (DSP) hierarchy IP fixed point bit accurate
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参考文献7

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共引文献19

同被引文献13

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