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一种低功耗抗辐照加固256kb SRAM的设计 被引量:9

Design of a Low Power Radiation Hardened 256kb SRAM
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摘要 设计了一个低功耗抗辐照加固的256kb SRAM。为实现抗辐照加固,采用了双向互锁存储单元(DICE)结构以及抗辐照加固版图技术。提出了一种新型的灵敏放大器,采用了一种改进的采用虚拟单元的自定时逻辑来实现低功耗。与采用常规控制电路的SRAM相比,读功耗为原来的11%,读取时间加快19%。 In this paper a low power radiation hardened 256kb SRAM is presented. The Dual Interlocked storage Cell (DICE) and radiation hardened layout techniques have been implemented to achieve radiation hardened. A novel sense amplifier has been proposed and modified self-timing scheme with dummy cell for low power operation has been adopted in this SRAM. It has consumed only 11% read power dissipation and the access time can improve 19% compared with the conventional control circuit.
出处 《微电子学与计算机》 CSCD 北大核心 2007年第7期142-145,共4页 Microelectronics & Computer
关键词 SRAM 抗辐照加固 灵敏放大器 低功耗 SRAM radiation hardened sense amplifier low power
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参考文献6

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二级参考文献6

  • 1K Sasaki, A 7ns 1MB CMOS SRAM with Current Sense amplifier, ISSCC 1992: 208~209.
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