摘要
将差分输出、套筒式共源共栅、并联负反馈缓冲级相结合,应用到低噪声放大器,设计出一种新型的低噪声运算放大器。给出了用SMIC 0.35μm工艺模型完成电路设计的过程;测得开环增益为60.7 dB,共模抑制比为107 dB,增益平坦带宽为92.5 kHz,噪声为6.203 nV/sqrt(Hz)。测试结果证明了设计的正确性。
A new type of low-noise amplifier was designed by combining differential output with telescopic cascode and shunt negative feedback. Design of the circuit based on SMIC＇s 0. 35/zm process model is described. Simulation results show that the LNA has an open-gain of 60.7 dB, a common-mode rejection ratio of 107 dB, a flat-gain bandwidth of 92. 5 kHz and a noise of 6. 203 nV/sqrt （Hz）, which validates the design.
出处
《微电子学》
CAS
CSCD
北大核心
2007年第3期390-393,398,共5页
Microelectronics
