一种宽带、低失真、高过载特性的Sigma-Delta模数转换器结构

A Wideband Low-Distortion Sigma-Delta Modulator with Improved Performance in Overload Condition

提出一种混合Sigma-Delta级联调制器结构.结合传统和低失真结构的优点,包括4级:第一级采用二阶多位低失真结构,后面级联传统的一阶调制器.这种结构可以大大减小由于第一级调制器输入信号过大引起的非线性,同时可以较好地抑制带内噪声,因而非常适用于低过采样率和高精度的转换器设计.仿真结果表明,混合Sigma-Delta级联调制器结构具有高的过载特性、节省功耗和芯片面积等优点,适合宽带宽领域的应用.

A new kind of cascaded or MASH Sigma-Delta ADC topology is presented. The topology includes four stages： the first stage is realized by second order low-distortion multi-bit structure, while the following stages are realized by traditional first order structure. This kind of structure can greatly reduce the nonlinear effects by using low-distortion structure in the first stage, and suppress the in-hand noise, so it can reduce the over sampling ratio （OSR） effectively. The simulation also shows that it has well over loaded condition and power saving characters. This kind of topology reveals a good efficiency in the wide bandwidth application.