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低压差稳压电源的折返式限流保护电路的设计 被引量:1

Design of a Foldback Current Limit Circuit in LDO
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摘要 为了防止因负载短路和过载对芯片造成永久性的伤害,芯片中通常需要加入限流保护电路。文中从限流保护的原理出发,设计了一款用于LDO的折返式(FOLDBACK)限流保护电路。该电路不仅很好地完成了限流保护功能,同时大大降低了芯片的短路功耗。该设计采用0.6μmBiCMOS高压工艺。Hspice仿真结果表明:与常规的恒定电流限制相比,折返式限流电路在限流状态下能使系统的功耗减少70%以上。 The current limit circuit is usually used in the chip in order to prevent chip from being permanently destroyed by the mass current , which is caused by the short circuit of load or over current. The article designed a foldback current limit circuit for LDO according to the above principal. This foldback circuit not only provides good performance in current limiting, but also reduces the power consumption of the chip at heavy load. This design adopted the BiCMOS 0. 6μm process technology, and the Hspice simulating result shows that comparing with the regular constant current limit, the foldback circuit could reduce the power consumption of the system to 30% of the original consumption.
出处 《通信电源技术》 2007年第4期31-32,44,共3页 Telecom Power Technology
关键词 LDO 限流保护 折返式 LDO constant current limit, foldback
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参考文献4

  • 1郭建平.一种用于LDO稳压器的折返式限流电路[J].电子设计应用,2006(5):107-109. 被引量:3
  • 2[2]CHENG Xiao-jie,FENG Quan-yuan.A low-power high reliability CMOS current limit circuit[C].APMC2005 Proceedings,2005.
  • 3[3]Robert Marnrnano,Jonathan Radovsky,Unitrode IC Corp,George Harlan,Power General,A new linear regulator features switch mode overcurrent protection[Z].C82719-3/89/oooO-0159.IEEE,1989.
  • 4[4]LIN Chuan,FENG Quan-yuan.Design of current limiting circuit in low dropout linear voltage regulator[C].APMC2005 Proceedings 0-7803-9433-X/05/.2005 IEEE,2005.

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