一种高速Viterbi译码器幸存路径管理模块的改进结构

Optimized Architecture of Survivor Path Management Unit of High-Speed Viterbi Decoder

针对高速Viterbi译码器的高速,低延迟,低电路复杂度的要求,在分段执行的Hybrid Trace Forward方法的基础上,提出了一种新的幸存路径管理模块(SMU)结构—固定段长的结构。对于(m,n,k)的Viterbi译码器,约束长度为k,则固定段长为k-1,既节省了存储空间,又消除了回溯过程,从而降低了延迟时间和电路复杂度。文中设计了一个(2,1,7)Viterbi译码器的SMU模块,采用固定长度为6的结构。相比于传统的分段执行的Hybrid Trace Forward结构,译码延迟减小了17%,输出数据间隔减小了33%,并且省去了存储器的使用。

This paper presents a novel architecture of survivor path management unit of high-speed Viterbi decoder, which is based on the subsection of Hybrid Trace Forward architecture. The length of each block is fixed in this architecture. For a （m, n, k） Viterbi decoder, the length is set as k-1, and the new architecture abandons the RAM and the process of trace back, so as to decrease the latency and complication. We design a SMU module of （2, 1,7） Viterbi decoder and set the length of block 6. Compared with the subsection of Hybrid Trace Forward architecture, the latency decreases 17%, the interval of output data decreases 33%, and the RAMs are abandoned.