H.264整数DCT的FPGA实现

Implementation of integer DCT in H.264 on FPGA

文章分析了新一代视频编码标准H.264的整数DCT变换的原理和快速算法。介绍了一种采用FPGA实现整数DCT变换模块的设计方案,提出了一个完整的硬件电路结构设计。模块采用全硬件实现,用VHDL语言描述了该模块的硬件结构。仿真结果表明,可在四个时钟周期内完成一个4×4块的二维整数DCT。

This paper analyses the principle and fast algorithm of the integer DCT in H.264, introduces a method of design that performed the integer DCT based on FPGA, and presents a integrated hardware circuit design.The whole architecture is performed based on hardware,and VHDL is used to design this architecture.The simulation results indicate this architecture can perform the integer DCT of 4×4 block in four clock cycles.