摘要
文章从数据和时钟恢复,编解码过程中位填充、位剥离及纠错,PID纠错、数据切换同步和重试机制以及CRC校验等4个方面入手,阐述了基于数据可靠性的USB接口硬件的设计和实现。对所设计接口电路的RTL级、门级仿真以及FPGA验证表明,该设计在功能和时序上符合数据可靠性的要求。
The hardware design and implementation of USB interfaces based on data reliability are considered from four aspects： sampling of unstable data, bit stuffing/stripping and data error checking, PID checking and the mechanism of data toggle synchronization and retry, and the cyclic redundancy check（CRC）. The RTL-level simulation, gate-level simulation and FPGA emulation indicate that the whole design meets the requirement of data reliability in timing and function.
出处
《合肥工业大学学报（自然科学版）》
CAS
CSCD
北大核心
2007年第8期999-1002,共4页
Journal of Hefei University of Technology：Natural Science
基金
国家自然科学基金资助项目(60373076)
关键词
数据可靠性
时钟恢复
非归零翻转
循环冗余校验
data reliability
clock recovery
none return to zero invert
cyclic redundancy check
