摘要
通用数据回放器通常用于检验实时信号处理器的接收和实时处理能力,或者设备的故障检测。本文针对嵌入式通用数据回放器,重点讨论了基于FPGA的嵌入式PCI总线数据回放卡的设计,由于板卡采用了FPGA和NiosII软核技术,降低了硬件设计难度,减少板卡功耗,提高了适应性、通用性和可扩展性,同时,采用乒乓SDRAM大容量存储技术,提高了数据回放器的实时性等性能指标。
General data replayer is used to test the data receiving and real-time processing capability of real-time signal processor, or detect instrument fault. In this paper, a new design of general data replayer is given. A novel PCI bus data replaying board is discussed in detail. By using FPGA and NioslI soft embedded processor, the design of the board is simplified. And lower power, excellent adaptability, and expansibility are available. The real time of the replayer is also improved with large-scale data storage based on ping-pong SDRAM.
出处
《微计算机信息》
北大核心
2007年第05Z期9-10,34,共3页
Control & Automation
基金
部委基金项目(J011-2004104)
