大规模集成电路相关测试标准的剖析

Analysis of LSI Related Testing Standards

集成电路测试是保证集成电路质量、发展的关键手段。CMOS器件进入超深亚微米阶段,集成电路继续向高集成度、高速度、低功耗发展,使得IC在测试和可测试性设计上都面临新的挑战。重点研究了纯数字信号、混合信号和片上系统测试的一些问题和相关标准,包括IEEE 1149.1-1990到IEEE 1149.6-2003,IEEE 1450,IEEE 1500,IEEE-ISTO Nexus 5001等测试标准。总结了集成电路测试标准的特点和最新进展,分析了这些标准在实际应用中存在的一些问题及其局限性,并对今后集成电路测试技术标准的发展给出了预测。

IC test is a critical means to ensure the quality and the development of IC. CMOS device dimensions scale down to the very deep submicrometer. ICs are going towards higher density, higher speed and lower power dissipation, making new challenges on IC test and design for test. The problems in the test of all-digital signal ICs, mixed signal ICs and system-on-a-chip were investigated in detail, boundary-scan test standards IEEE 1149.1 to 1149.6, IEEE 1450, IEEE P1500, IEEE- ISTO Nexus 5001 were introduced. Analysis of the characteristic and the new development of each standard were summarized, problems in the application of the standards were analyzed. The prospect of IC testing standard was also presented.