摘要
介绍了一种基于USB总线的高速并行数据采集系统的设计方案及实现方法。系统每个采样通道模块均由一组独立的A/D和双端RAM组成,多个采样通道模块组成多通道全并行采集系统;采用Xilinx公司的复杂可编程逻辑器件(CPLD)XC95144XL为控制核心,CY7C68013为USB控制器,异步双端RAM为数据缓冲区,结合A/D采样模块组成三级流水线结构,使数据采集、数据缓冲、数据传输等操作并行执行,达到了高速、并行的数据采集和传输要求。详细描述了此设计方案的硬件和软件实现,实验表明该系统具有高速、实时、性价比高等特点。
The design and implementation of a high-speed parallel data collection system based on USB is introduced. Each of the sample channels consists of A/D and RAM model, several channels compose the multi-channel parallel data acquisition System. Using Xilinx＇s CPLD as control core, CY7C68013 as USB controller and asynchronous double port RAM as data buffer, combined with A/D model, the operations of data collection, data buffer and data transfer are carried out parallel. The hardware and software implementation of the solution is described in detail. The system has the advantage of high speed, real-time, high cost-performance in the experiment.
出处
《计算机测量与控制》
CSCD
2007年第8期1105-1107,共3页
Computer Measurement &Control
基金
浙江省科技厅科技成果推广计划重点项目(2005D50001)。
