一种面向硬件线程的实时调度算法研究与设计

Research and Design of a Real-Time Scheduling Algorithm for Hardware-Thread

本文根据硬件线程的特征,为硬件线程调度建立了一个周期与非周期混合线程集的调度模型.在数学层面描述了硬件多线程调度中每个线程被成功调度的条件判据.并在此基础之上,提出一种以截止时间与最坏执行时间差为基本因子的DR-EDF算法,提供了一种实现这种DR-EDF算法的硬件多线程控制器的设计原理.最后用FPGA为载体,实现了一款硬件多线程处理器,通过实际测试的分析结果,得出这种面向硬件多线程的实时调度算法在不影响线程集错失率前提下,提高了嵌入式系统中紧急任务的可调度性.

Based on the characteristics of the hardware scheduling, a scheduling model for the periodic and un-periodic threads in hardware scheduling is proposed. The criterion of the successfully scheduled threads is presented by mathematical description. On this basis, the DR-EDF algorithm based on the deadline and the difference of the worst executing time is proposed. The design of thread-scheduling controller using the DR-EDF is brought forward. And the processor based on the DR-EDF algorithm is achieved on an FPGA. The results of experiment show that the scheduling failure rate will not be affected and scheduling-ability for emergency threads is improved.