基于布尔过程的低功耗互联线设计

Design of interconnected bus for low power based on boolean process

在布尔过程理论的基础上提出互连线功耗的扩展模型,该模型综合考虑互连线自身跳变及互连线间的耦合跳变所引起的功耗。并据此提出一个功耗优化算法,该算法通过调整互连线的布局以及相邻互连线间的距离以达到功耗优化的目的。实验结果表明该方法有较好的优化效果。

In this paper, we propose an interconnected bus power consumption model based on Boolean process, which includes the self transition power dissipated on the signal lines and the coupled transition power dissipated between adjacent signal lines. A heuristic algorithm is presented to determine a physical order of signal lines and to adjust the distance between adjacent signal lines. Simulation results show that the proposed technique achieves better reduction in terms of power consumption comparing with existing methods.