SoC中IP核间互联总线完整性故障测试模型

A New Fault Model for Testing Signal Integrity in SoCs

在对互联总线信号完整故障发生原理进行详细分析的基础上,提出了一种有效的互联总线信号完整性故障激励检测模型——HT模型。仿真结果表明该模型在故障覆盖率和测试矢量的有效性方面分别比已有的最大激励串扰故障模型和多重跳度模型有较大的改善。

Based on the in-depth research of the property of crosstalk fault, we presented a more efficiency Half Transition （HT） model to detecting signal integrity fault in System-on-Chip （SoC） interconnects between IP cores. In comparison with Maximal Aggressor Fault （MAF） model and Multiple Transition （MT） model, this HT model can achieve 100% faults coverage and need less test pattern. The result of theoretic analyses shows the HT model＇s excellence in comparison with MAF model in fault coverage and with to MT model in test pattern＇s efficiency.