具有高压互连线的多区双RESURF LDMOS击穿特性

Breakdown Characteristic of Multiregion Double RESURF LDMOS with High Voltage Interconnection

对600V以上级具有高压互连线的多区双RESURF LDMOS击穿特性进行了实验研究,并对器件进行了二维、三维仿真分析.利用多区P-top降场层的结终端扩展作用以及圆形结构曲率效应的影响,增强具有高压互连线的横向高压器件漂移区耗尽,从而降低高压互连线对器件耐压的影响.实验与仿真结果表明,器件的击穿电压随着互连线宽度的减小而增加,并与P-top降场层浓度存在强的依赖关系,三维仿真结果与实验结果较吻合,而二维仿真并不能较好反映具有高压互连线的高压器件击穿特性.在不增加掩模版数、采用额外工艺步骤的条件下,具有30μm高压互连线宽度的多区双RESURF LDMOS击穿电压实验值为640V.所设计的高压互连器件结构可用于电平位移、高压结隔离终端,满足高压领域的电路设计需要.

A multiregion double RESURF LDMOS with a high voltage interconnection of over 600V is experimentally realized. Using the effects of a junction＇termination extension of the P-top layer and the curvature of a circular structure, the breakdown voltage of the lateral high voltage device is improved by spreading the depletion region. Two- and three-dimensional simulation results are presented. The breakdown voltage of the LDMOS with high voltage interconnection is not exact in the two-dimensional simulation. In agreement with the 3D simulation, the experimental results show that the breakdown voltage of the LDMOS,which depends strongly on the concentration of the P-top layer,will increase with the reduction of the width of the high voltage interconnection. When the width is 30μm, the breakdown voltage is 640V without adding additional masks or process steps. As a result, the structure can be used in conventional level shifting and high voltage junction isolation termination for high voltage applications.