宽带低噪声CMOS数字电视频率综合器

A Wideband Low Noise CMOS DTV Frequency Synthesizer

介绍了一块CMOS数字电视调谐芯片中的宽带PLL频率综合器。该芯片使用经典的单变频三波段结构,VCO通过片外谐振回路产生了从80MHz到910MHz的频率用于电视调谐。VCO模块采用了独创的稳幅机制来满足输出的幅度和相噪特性在宽带范围内的基本一致;同时对电荷泵的电流失配和输出噪声之间的关系进行了分析,优化了电流失配,同时获得了较好的输出噪声。该频率综合器采用3.3V 0.35μm CMOS RF工艺,满足了DVB-CQAM64数字电视的低噪声要求,实现了清晰的数字电视接收,最后给出了测试结果。

A wide-band frequency synthesizer in a CMO$ DTV tuner chip is presented. The tuner chip adopts the classic three-band single conversion architecture. Off-chip resonator is used in VCO to generate local oscillation from 80 MHz to 910MHz. A novel automatic amplitude control（AAC） module is used in the VCO block to maintain the output performance in such a wide band. The paper also analyzes the relationship between current mismatch and output noise of charge pump then optimization is made to reach good performance. The synthesizer is implemented in 3.3 V 0. 35 μm CMOS process and can satisfy the low noise requirements of DVB-C QAM64 standard. Through the synthesizer, the tuner can receive DTV signals clearly. The testing results are proposed.