摘要
设计一种串行时钟芯片的I2C总线接口电路。分析I2C总线协议的原理,采用自顶而下的设计方法,首先给出电路的整体框图,然后重点说明一些主要电路的设计。电路在0.6umCMOS工艺上实现,经SPICE仿真,结果表明电路达到了预期的设计要求。
An I2C bus interface circuit of a serial real-time clock chip is presented. Top-Down method is used. It showes a function block diagram of the circuit, and then illuminates the designs of important circuits.A practical circuit is implemented on 0.6um CMOS process, simulating by SPICE, and the desirable result is observed.
出处
《计算机与数字工程》
2007年第9期180-183,共4页
Computer & Digital Engineering