摘要
基于嵌入式系统中对图像实时采集的需要,提出了一种利用复杂可编程逻辑器件CPLD来设计DSP图像压缩系统中数据采集存储模块的方案,重点讨论了CPLD在数据采集过程中的工作流程和控制方法。全文详细分析了CPLD输入输出信号的逻辑控制时序关系,分别就模拟I2C总线、数据采集的逻辑功能设计、CPLD逻辑功能仿真验证等进行了详细介绍。
Based on the needs for real-time image gathering in embedded system,this paper put forwards a plan uti- lized CPLD to design data acquisition module of image compression system based on DSP,it focuses on the proce- dure and control method of CPLD in the gathering. The paper analyzes the time relation of CPLD in signal input and output,and introduces respectively simulation of I^2C bus,logical function design of data gathering,simulation vali- dation of CPLD in logical function and so on.
出处
《自动化与仪表》
2007年第5期66-68,75,共4页
Automation & Instrumentation
基金
广西科技攻关项目(020359-5
0435-9)