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非对称型门极换流晶闸管的优化设计 被引量:1

Optimum design of asymmetric gate commutate thyristor
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摘要 根据半导体器件的设计特点和设计原则,对600 A/3 000 V非对称型门极换流晶闸管进行了结构参数的优化设计,得到了材料参数与结构参数的关系.阴极采用条状同心环单元发射极排列结构,不仅可以提高单元承受应力的能力,而且可使单元均匀性得到改善.应用数值分析,使器件的透明阳极和缓冲层等关键结构的掺杂分布、区域宽度以及少子寿命得到优化,计算结果满足设计的要求. Optimal structural parameters of a 600A/3000V asymmetric gate commutation thyristor(AS- GCT)were determined according to the design characteristics and criteria of semiconductor devices. Optimal relationships between material and structural parameters were quantitatively investigated. The ideal cathode was found to be strips of emitters arranged in concentric rings around the device center. This increased the thermal and electrical stresses that the emitter tolerated and improved the uniformity of cells. Key structural parameters, such as the dopant distribution of the transparent anode and buffer layer as well as the lifetime of the minority carrier, were optimized. As a result, design requirements are satisfied.
出处 《哈尔滨工程大学学报》 EI CAS CSCD 北大核心 2007年第9期1044-1047,共4页 Journal of Harbin Engineering University
基金 哈尔滨工程大学基础研究基金资助项目(002080260727)
关键词 功率半导体器件 优化设计 门极换流晶闸管 缓冲层 透明阳极 power semiconductor device optimal design gate commutation thyristor buffer layer transparent anode
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参考文献10

  • 1EICHER S, BAUER F, WEBER A, et al. Punchthrough type GTO with buffer layer and homogeneous low efficiency anode structure[A]. IEEE ISPSD [C]. Hawaii, USA, 1996.
  • 2ZELLER H R. Cosmic ray induced failure in high power semiconductor devices [J]. Solid State Electronics, 1995,38 : 2041-2046.
  • 3聂代柞.电力半导体器件[M].北京:电子工业出版社,1994.
  • 4FUJIWARA TAKASHI CO INT PROP. Semicon-ductor device improved in resistance to breaking due to cosmic rays [P]. Japan. EP0668617. 1995-08-23.
  • 5HE Jin, ZHANG Xing, WANG Yangyuan, et al. Optimum design of punch-through junction used in bipolar and unipolar high voltage power devices [J].Solid-State Electronics, 2002,46 (6) : 847-851.
  • 6DUTTA R, ROTHWARF A. Design considerations for p-i-n thyristor structures [J]. IEEE Transactions on Power Electronics, 1992,7 (2) : 430-435.
  • 7EICHER S, BAUER F, ZELLE H R, et al. Design considerations for a 7kV/3kA GTO with transparent anode and buffer layer[A]. IEEE PESC Record[C]. New York, USA, 1996.
  • 8CHUNG S K. Injection currents analysis of p^+/n^-buffer junction [J]. IEEE Transactions on Electron Devices, 1998,45(8) :1850-1854.
  • 9TAYLOR P D. A comparison of thyristor device designs [A]. International Conference on Power Electronics and Variable-speed Drives[C]. London, 1984.
  • 10AZUMA M, TAKIGAMI K. Anode current limiting effect of high power GTOs[J]. IEEE Transactions on Electron Devices, 1980,27 : 1850-1854.

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同被引文献9

  • 1Eicher S, Bauer F, Weber A, et al. Punchthrough Type GTO with buffer layer and homogeneous low efficiency anode structure [J]. IEEE ISPSD, 1996,261 -264.
  • 2Harold M. IGCT - megawatt power switches for medium - voltage applications [ J ]. ABB Review, 1997.
  • 3Sven Klaka. The Integrated Gated - Commutated Thyristor: A New High - Efficiency, High - Power Switch for Series or Snubberless Operation [ A ]. PCIM [ C]. 1997.
  • 4Steimer P K, Gruning H E, Werninger J, et al. IGCT - a new emerging technology for high power, low cost inverters [J]. IEEE Industry Applications Magazine, 1999, 5: 12-18.
  • 5Christopher M S. Introduction to semiconductor device modeling [ M ]. Singapore: World Scientific Publishing Company, 1986.76 - 79.
  • 6Silvaco User's Manual [Z]. 2002.
  • 7Eicher S, Bauer F, Zelle H R,et al. Design considerations for a 7 kV/3 kA GTO with transparent anode and buffer layer [J]. IEEE PESC Record, 1996, 1:29 -34.
  • 8Matsudal Tomoko, Nakagawa Akio. High voltage semiconductor device and method for manufacturing the same [ P]. European Patent (EP1 237 200 A2), 2002.
  • 9Bakowski M, Galster N, Hallen A, et al. Proton irradiation for improved GTO thyristors [ A]. IEEE ISPSD[ C]. 1997, 77 - 80.

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