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FPGA测试中故障屏蔽现象的解决方法

Masking of Faults in the Testing of FPGA
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摘要 以Xilinx公司FPGA的理论结构为结构模型,提出了FPGA测试中的故障屏蔽现象,并给出该现象的产生原因和判断条件,在此基础上进一步提出相应的解决办法和建议,避免或减少了故障屏蔽现象的出现,提高了测试FPGA的故障覆盖率。 The Field Programmable Gate Arrays (FPGAs)are widely used in hardware implementation of many designed circuits. To detect the faults of FPGAs is very important, This paper discusses the problem which we called it the masking of faults. We focus on finding when and where it will appear, and give the methods and suggestions to avoid or reduce its appearing, thus the fault coverage is improved.
出处 《电脑开发与应用》 2007年第10期39-41,共3页 Computer Development & Applications
关键词 FPGA测试 测试方法 故障屏蔽 FPGA testing test method masking of faults
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参考文献6

  • 1Huang W K, Meyer F J, Lombardi F. A XOR-Tree based Approach for Testing and Diagnosing Configurable FPGAs [A]. Japan : 6th ATS[C], Japan. 1997.
  • 2Huang W K,Lombardi F. Multiple Fault Detection in Logic Resources of FPGAs[A]. France :International Symposium on Defect and Fault Tolerance in VLSI Systems [C]. 1997.
  • 3Huang W K, Meyer F J, Lombardi F. An Approach for Detecting Multiple Faulty FPGA Logic Blocks[J]. IEEE Transactions on Computers ,2000: 48-54.
  • 4Renovell M, Portal J M, Figueras J. et al. An Approach to Minimize the Test Configuration for the Logic Cells of the Xilinx XC4000 FPGAs Family[J]. Journal of Electronic Testing : Theory and Applications, 2000: 289-299.
  • 5Goyal S, Choudhury Mi. Multiple Fault Testing of Logic Resources of SRAM-Based FPGAs[A]. India: Proceed-ings of the 18th International Conference on VLSI Design Held Jointly with 4th International Conference on Embedded Systems Design[C]. 2005.
  • 6Doumar A, Hideo I. Detecting, Diagnosing and Tolerating Faults in SRAM-Based Field Programmable Gate Arrays : A Survey[J] . IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2003,11 (3): 386-405.

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