FPGA片上PowerPC系统设计

Design of PowerPC System Based on FPGA

针对星载合成孔径雷达数据压缩器接口非标准、功能测试复杂的特点,文中采用了嵌入式片上系统的思想开发了一种新型的辅助数据测试仪;该系统利用嵌入在FPGA中的PowerPC405处理器硬核完成数据传送功能,大大提高了系统集成度;利用FPGA的逻辑单元搭建存储器和外设控制器,从而提高了设计的灵活性;其应用结果表明系统数据传输稳定、可靠,并且可增加更多外设控制器以扩充辅助数据测试仪的功能,因而可移植性强。

On account of the non-standard interface of space-borne SAR data compressor and the complexity of its function-testing, this paper adopts the idea of embedded System on-Chip to design a noval type of aided testing instrument. The system utilized an embedded PowerPC405 hardware core in the FPGA to transport data and this improves the system integration completency greatly. The design flexibility was improved through building up the RAM and the peripheral contronller using the FPGA logic cells. The application shows that the system runs stably and reliably and it can be easily extended functionally by adding more peripheral controllers, and so the system can be migrated easily.