摘要
提出了一种在标准CMOS工艺下实现时间延迟积分(TDI)功能的电路结构,电路采用一面阵CMOS像素阵列,通过像素列曝光累积实现了TDI功能。详细分析了器件噪声和积分器噪声对电路的影响,提出了器件级噪声优化公式。电路采用SMIC 0.35μm CMOS工艺实现。仿真结果表明,该电路能够实现TDI功能,运算放大器的等效输入噪声为36.1μV,具有低噪声特性。
A novel time-delay integration(TDI) structure is proposed by using standard CMOS technology, which is realized by the array CMOS pixel cell and column pixel accumulation. In this paper an analyzable formula is derived and the methods of noise optimization are proposed. The circuit is realized with SMIC 0. 35 μm CMOS technology. SPICE simulation results show that the circuit has the Iunctioin of time delay integration,and the equivalent input noise of operational amplifier(OPA) is 36. 1 μV which has a low noise characteristic.
出处
《光电子.激光》
EI
CAS
CSCD
北大核心
2007年第10期1162-1165,共4页
Journal of Optoelectronics·Laser
基金
国家自然科学基金资助项目(60576025)