低功耗∑△调制器系统设计与研究

Design and research on low power system for ∑△ Modulator

详细介绍了∑△调制器系统级低功耗设计的步骤和考虑因素。分析和比较了开关电容、连续时间、开关运放、开关RC等∑△调制器的实现方式。分析了调制器阶数与过采样率在低功耗设计中的折衷性问题。在具体的实现结构方面,比较了前馈和反馈两种结构,并介绍了通过增加反馈支路进行零点优化从而提高信噪比的方法。最后考虑∑△调制器比较重要的非理想因素,比如各类噪声、运算放大器的有限增益、有限增益带宽积、有限压摆率、饱和电压、时钟抖动等。并介绍了如何根据这些非理想因素计算得出系统中各个模块的最低性能指标,从而得到满足系统设计要求的最低功耗。以一个实际的项目为例,探讨了进行实际设计时的考虑因素与选择依据。

The design process and consideration factors for the system level design of low-power ∑△ A modulator were introduced. Several implementation methods for ∑△ modulator were analyzed and compared, including switched-capacitor, continuous-time, switched-opamp and switched-RC. The trade-off problem between orders and over sampling rate was also analyzed in the low power design. In the aspect of realization structure, comparison between feedforward structure and feedback structure was made, and a method to enhance SNR by inducing a feedback path was introduced. In the end, the important non-ideal factors were considered in ∑△ modulators, such as all kinds of noise, op-amp finite gain, finite GBW, finite slew rate, saturation voltage, clock jitter, and so on. Also, how to caleulate the minimum spee for each module according to these non-ideal factors was introduced. The practical factors were discussed by taking a real project as an example.