基于VHDL的脉冲增量式多功能插补器的设计与实现

Design of Pulse Increment Multifunctional Interpolator Based on VHDL

介绍了脉冲增量式插补算法的主要特点,分析了软件插补器的不足和利用可编程逻辑器件实现硬件插补器的基本思路,阐述了VHDL输入法的优势,归纳了基于VHDL语言编程实现多种脉冲增量式常用插补算法综合硬件插补器的思路,给出了具体的程序结构及时序仿真结果,针对VHDL语言的特点,讨论了芯片资源的优化问题。

It introduces the main features of the pulse increment interpolation method, analyses the disadvantage of the .software interpllator and the feasibility of designing the hardware interpolator used PLD, expati- ates the superiority of the VHDL. It presents the scheme of realizing the multifunction hardware interpolator, which can integrate the manifold common interpolation arithmetic. It describes the structure of the corre- sponding program, achieves the simulation waveform. Based on the characteristic of VHDL, it discusses the optimization design thought of the FPGA resource.