摘要
在波分复用系统中,光监控信道用来传送网管信息。介绍了一种WDM(波分复用)光监控信道的设计方法,使用Altera FPGA(现场可编程门阵列)完成光监控信道板的核心功能。发送部分主要由时钟模块、HDLC(高级数据链路控制)和E1时序产生及成帧模块、NRZ(不归零码)/CMI(传号反转码)、公务电话处理模块和单片机时序发生模块组成,接收部分包括时钟模块、E1帧同步检测与HDLC标志字检测处理模块、NRZ/CMI解码模块等。设计采用自顶向下的方法,各功能模块由VHDL语言设计完成。该设计已经成熟应用在实际的WDM系统中。
Network management message was transmitted by Optical Supervising Channel in WDM. This paper introduces a Optical Supervising Channel circuit board which core part was designed with Altera FPGA. The transmit part includes clock generation module, HDLC and E1 framer, NRZ to CMI encoder, telephone and signaling processing, MCU bus timing generation. The receive part includes clock generation module, E1 frame boundry detection and HDLC flag detection, CMI to NRZ decoder and so on. Function was classified into module with Top-Down Approach. The module was programmed with VHDL. The design have been applied in practical WDM system reliably.
出处
《电子工程师》
2007年第10期26-27,30,共3页
Electronic Engineer