基于矩阵相似变换的并行流水线CRC实现

Matrix-similarity-transformation-based pipeline architecture for parallel CRC implementation

研究了通用并行化循环冗余校验（CRC）编码结构,分析了限制编码速度提高的主要原因,根据多项式理论推导了并行CRC编码的一般化方法.在此基础上,根据线性代数中的有理标准型理论对编码结构中的反馈运算矩阵进行相似变换,提出了CRC编码的高速流水线并行结构,并设计实现了多种不同并行度下的CRC编码器.设计结果表明,高速流水线并行CRC编码器结构相对于其他结构具有最优的编码速度和最优的时序特性,可以满足高速数据完整性校验的需求.

Universal pipeline architecture for parallel cyclic redundancy check （CRC） implementation was proposed. This paper studied the primary reason for calculation speed limitation and concluded a theoretical result in parallel CRC calculation from the polynomial theory. The feedback matrix operation in parallel CRC caculation was optimized using similarity transformation based on the theory of rational canonical form in Linear Algebra and innovatively derived high-speed pipeline architecture for parallel CRC implementation in any condition. CRC encoders in different parallelism were implemented to evaluate the performance. The results show that CRC encoder based on pipeline architecture is much better than others in coding speed and the requirement for data integrity checkin high speed application is satisfied.