功率载荷下叠层芯片封装热应力分析

Thermal Stress Analysis in Stacked Die Packaqe under Power Load

应用有限元分析软件ANSYS,模拟功率载荷下叠层芯片封装中各层的温度和应力分布.分析结果表明,下层芯片最高温度、最大等效应力和剪应力分别为412.088 K,143 MPa,65.4 MPa,下层芯片的边角处应力和剪应力值最大,也是芯片最容易破坏和开裂的位置.

The finite element analysis （FET） software ANSYS have been used to simulate the temperature and stress distribution in stacked die package under power load. The simulating results show that the highest temperature, the maximum Von Mises stress and shear stress in the bottom die are 412. 088 k, 143 MPa, 65.4 MPa respectively. The maximum Von Mises stress and shear stress are in the corner of the bottom die in which the die apts to be destroyed.