期刊文献+

多级拥塞控制的NOC路由算法 被引量:10

A Multilevel Congestion Control Routing Algorithm for Network-on-Chip
下载PDF
导出
摘要 提出了一种多级拥塞控制片上网络(NOC)路由算法.当NOC处于中度和重度拥塞时,该算法根据各路由器拥塞等级的差别决定如何对本地拥塞进行处理.仿真结果表明,在均匀随机流量和对称随机流量下,NOC使用该算法的平均传输延迟小于单级拥塞控制算法. A multilevel congestion control (MLCC) network-on-chip routing algorithm was proposed to improve the routing efficiency. When there happens medium and high level congestion, MLCC will decide how to do congestion control depending on the congestion level difference of the routers. Simulation results show that MLCC maintains low latency than one level congestion control routing algorithms under uniform traffic and transpose traffic.
出处 《北京邮电大学学报》 EI CAS CSCD 北大核心 2007年第5期91-94,共4页 Journal of Beijing University of Posts and Telecommunications
基金 国家"863计划"项目(2002AA1Z1490)
关键词 多级拥塞控制 片上网络 路由算法 multilevel congestion control network-on-chip routing algorithm
  • 相关文献

参考文献13

  • 1Kumar S, Jantsch A, Soininen J P, et al. A network on chip architecture and design methodology [ C] // ISVLSI 2002, Pittsburgh. Pennsylvania: IEEE Press, 2002: 117-124.
  • 2Benini L, Micheli G De. Networks on chips: a new soc paradigm[J]. Computer, 2002, 35: 70-78.
  • 3Henkel J, Wolf W, Chakradhar S. On-chip networks: a scalable, communication centric embedded system design paradigm[J]. VLSI Design, 2004: 845-851.
  • 4Wu Dong, Al-Hashimi B M, Schmitz M T. Improving routing efficiency for network on chip through contention- aware input selection[J]. Design Automation, 2006: 24- 27.
  • 5Ni L M, McKinley P K. A survey of wormhole routing techniques in direct networks[J]. IEEE Tran on Computers, 1993, 26: 62-76.
  • 6Rijpkema E, Goossens K, Radulescu A, et al. Trade-offs in the design of a router with both guaranteed and besteffort services for networks on chip [J]. IEE Proceedings: Computers and Digital Techniques, 2003, 150: 294-302.
  • 7Nilsson E, Millberg M, Oberg J, et al. Load distribution with the proximity congestion awareness in a network on chip[C]//DATE 2003. Munich: ACM Press, 2003: 1126-1127.
  • 8Ye T T, Benini L, Micheli G De. Packetization and routing analysis of on-chip multiprocessor networks [J ]. Journal Of Systems Architecture, 2004, 50: 81-104.
  • 9Hu J, Marculescu R. DyAD-smart routing for networks-on-chip[C]//DAC2004. San Diego: ACM Press, 2004:260-263.
  • 10Ramakrishnan K, Floyd S. RFC2481--1999, A proposal to add explicit congestion notification (ECN) to IP [S]. San Diego: RFC Editor, 1999: 01.

同被引文献36

  • 1杨盛光,李丽,徐懿,张宇昂,娄孝祥,高明伦.基于拥塞预测的NoC自适应仲裁方法[J].计算机应用研究,2009,26(2):652-654. 被引量:2
  • 2李浩,谢伦国.片上多处理器末级Cache优化技术研究[J].计算机研究与发展,2012,49(S1):172-179. 被引量:6
  • 3高明伦,杜高明.NoC:下一代集成电路主流设计技术[J].微电子学,2006,36(4):461-466. 被引量:31
  • 4乔保军,石峰,计卫星.一种新型片上网络及其受限组播路由算法设计[J].江苏大学学报(自然科学版),2007,28(3):246-249. 被引量:4
  • 5Axel Jantsch, Hannu Tenhunen (Eds.). Networks on chip[M]. Boston : Kluwer Academic Publishers ,2003.
  • 6Li Lei. Communications in nctworks-on-chip [D]. Zhejiang University, 2007.
  • 7Zhou Gan-min. Basic research on NoC[D]. Hefei University of Technology ,2005.
  • 8Arnab Banerjee, Robert Mullins, Simon Moore. A power and energy exploration of network-on-chip architectures [A]. In: NOCS 2007 ed. IEEE Computer Society [C], Proceedings of the First International Symposium on Networks-on-Chip ,2007,163-172.
  • 9Xie Xi-ren. Computer network [M]. Beijing:Publishing House of Electronics Industry, 2009.
  • 10Xu Ke, Wu Jian-ping, Xu Ming-wei, et al. Advanced computer network-arehitecture, protocol mechanism, algorithm design and router technology [ M ]. Beijing : China Machine Press, 2009.

引证文献10

二级引证文献17

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部