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面向SoC的系统级设计语言 被引量：1

System-Level-Design Language for System-on-Chip
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摘要 目前集成电路的设计已经进入SoC时代,介绍了SoC设计所用的系统级设计语言的发展情况,以及典型的系统级设计语言在不同设计层次上的描述能力;并介绍了几种典型的系统级设计语言,给出了这些语言之间的特点对比,最后阐述了对系统级设计语言的看法,展望了其发展前景。 Currently the design of IC is in SoC era. Firstly presents the development of the system level design language for system - on - chip, and discusses its description capability at different abstract level. Also introduces some typical system level design languages and the comparison of those languages. Finally the points of view and the prospects for future of those languages are given.
作者 王兆菊 龚龙庆
机构地区 西安微电子技术研究所
出处 《计算机技术与发展》 2007年第11期84-87,共4页 Computer Technology and Development
关键词 系统级设计语言 SYSTEM VERILOG SYSTEMC SpecC system - level - design language SystemVerilog SystemC SpecC
分类号 TP312 [自动化与计算机技术—计算机软件与理论]
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参考文献6

  • 1Black D C,Donovan J.SystemC:From the ground up[M].Boston:Kluwer Academic Publishers,2004.
  • 2Bhasker J.A SystemC Primer[M].Allentown:Star Galaxy Publishing,2002.
  • 3Accellera.SystemVerilog 3.0:Accellera's Extensions to Verilog[M].Napa,California:[s.n.],2001.
  • 4SystemC 用户手册[EB/OL].2002-07.www.systemc.org.
  • 5Gajski D D,Zhu Jianwen,Domer R,et al.SpecC:Specification Language and Methodology[M].Boston:Kluwer Academic Publishers,2000.
  • 6熊悦,龚育昌,赵振西.嵌入式系统规范语言[J].计算机研究与发展,2003,40(3):493-499. 被引量：7

二级参考文献32

  • 1VHDL homepage, http://www.vhdl.org
  • 2Verilog homepage, http://www.verilog.com
  • 3R Ernst. Codesign of embedded systems: status and trends. IEEE Design & Test of Computers, 1998, 15(2): 45～54
  • 4K Wakabayashi, T Okamoto. C-Based SoC design flow and EDA tools: An AISC and system vendor perspective. IEEE Trans on Computer-Aided Design of Integrated Circuits and Systems, 2000, 19(12): 1507～1522
  • 5E M Clarke, O Grumberg, S Jha et al. Progress on the state explosion problem in model checking. In: LNCS 2000. Berlin: Springer-Verlag, 2001. 176～194
  • 6R Klein. Miami: A hardware software co-simulation environment. In: Proc of 7th IEEE Int'l Workshop on Rapid System Prototyping. Thessaloniki, Greece: IEEE, 1996. 173～177
  • 7W Ecker. Using VHDL for HW/SW co-specification. In: Proc of Euro Design Automation Conf. USA: IEEE, 1993. 500～505
  • 8S Swamy, A Molin, B Covnot. OO-VHDL: Object-oriented extensions to VHDL. IEEE Computer, 1995, 28(10): 18～26
  • 9M Radetzki et al. Objective VHDL: The object-oriented approach to hardware reuse. In: J-Y Roger, B Stanford-Smith, P T Kidd (Hrsg) eds. Advances in Information Technologies: The Business Challenge. Amsterdam: IOS Press, 1998
  • 10R Helaihel, K Olukotun. Java as a specification language for hardware-software systems. In: Proc of IEEE/ACM Int'l Conf on Computer Aided Design; Digest of Technical Papers. DC: IEEE CS, 1997. 690～699

共引文献6

同被引文献10

  • 1陈绍贺,赵明,王京.基于SystemC的片上系统设计[J].微电子学与计算机,2005,22(4):51-52. 被引量：11
  • 2肖建明,张向利.一种改进的时间片轮转调度算法[J].计算机应用,2005,25(B12):447-448. 被引量：15
  • 3韩霞,杨洪斌,吴悦.面向SoC的事务级验证研究[J].计算机技术与发展,2007,17(3):33-36. 被引量：10
  • 4Martin G. Overview of the MPSoC design challenges[ C]// Proceedings- the 43rd annual conference on Design automation. San Francisco: [s. n. ] ,2006:274 - 279.
  • 5Pavliclis V F, Friedman E G. 3 - D Topologies for Networks - on-Chip[j ]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems,2007,15(10) : 1081 - 1090.
  • 6Li F, Nicopoulos C, Richardson T, et al. Design and Management of 3D Chip Multiproccssors Using Network - in - Memory [ C ]//Proceedings - 33rd International Symposium on Computer Architecture, ISCA 2006. Washington: [ s. n. ], 2006:130- 141.
  • 7Feero B, Pande P P. Performance Evaluation for Three - Dimensional Networks - On - Chip [ C ]//Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures. Washington: [ s. n. ], 2007:305 - 310.
  • 8Richardson T, Nioopoulos C, Park D, et al. A Hybrid SoC Interconnect with Dynamic TDMA- Based Transaction- Less Buses and On- Chip Networks[C] //Proceedings - 19th International Conference on VLSI Design. Washington: [s. n. ], 2006: 657 - 664.
  • 9Francalanci C, Giacomazzi P. High - performance self - routhag algorithm for multiprocessor systems with shuffle interconnections[ J ]. IEEE Transactions on Parallel and Distributed Systems, 2006,17 ( 1 ) :38 - 50.
  • 10孟海波,张志敏.基于传输时间精确预测的片上总线仲裁算法[J].计算机辅助设计与图形学学报,2008,20(7):830-837. 被引量：4

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计算机技术与发展
2007年 第11期

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