低压低功耗CMOS电流运算放大器的设计

Design of CMOS CFOA with Low Voltage and Low Power

设计了一种新型CMOS电流反馈运算放大器结构,通过在输出端采用电阻反馈,增强负载能力,利用MOS管实现串联电阻以消除补偿电容带来的低频零点。使用0.5μm CMOS工艺参数,PSPICE模拟结果获得了与增益关系不大的带宽。电路参数为:80.7 dB的开环增益,266 MHz的单位增益带宽,62°的相位裕度,149 dB共模抑制比以及在1.2 V电源电压仅产生0.82 mW的功耗。

A new CMOS current-feedback operational amplifier （CFOA） based on the adoption of the resistance connecting across was presented for improving the drive capability. PSPICE simulation results of the CFOA using 0.5 μm CMOS process was obtained in a high slew-rate as well as bandwidth gain-independence. Circuit parameters are open loop gain 80.7 dB, unit gain bandwidth 266 MHz, phase margin 62°, CMRR 149 dB and power dissipation is only around 0.82 mW at 1.2 V supply voltage.