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高电源抑制比带隙基准电压源的设计 被引量:4

Design of a High PSRR Bandgap Voltage Reference
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摘要 提出一种采用0.25μm CMOS工艺的低功耗、高电源抑制比、低温度系数的带隙基准电压源(BGR)设计。设计中,采用了共源共栅电流镜结构,运放的输出作为驱动的同时也作为自身电流源的驱动,并且实现了与绝对温度成正比(PTAT)温度补偿。使用Hspice对其进行仿真,在中芯国际标准0.25μm CMOS工艺下,当温度变化范围在-25-125℃和电源电压变化范围为4.5-5.5 V时,输出基准电压具有9.3×10^-6V/℃的温度特性,Vref摆动小于0.12 mV,在低频时具有85 dB以上的电源电压抑制比(PSRR),整个电路消耗电源电流仅为20μA。 A high PSRR with low temperature coefficient CMOS band gap reference was presented, in which 0.25 μm CMOS model was used. In the design, the cascade current mirror was used in the circuit, the output of the OPAMP was used as the biases of itself and the next stage, and PTAT temperature compensate was realized. SMIC 0.25 μm double poly triple metal mixture signal model and Hspice tool were used for simulation. The simulation results show that the output voltage is with 9.3 × 10-6 V/℃ temperature rate and PSRR is more than 85 dB, the Vref swing is less than 0.12 mV at - 25 ℃ to 125 ℃ and the supply voltage range is 4,5 - 5.5 V. The total current consumption of power supply is less than 20μA,
出处 《半导体技术》 CAS CSCD 北大核心 2007年第11期984-987,共4页 Semiconductor Technology
关键词 带隙基准源 电源抑制比 低温度系数 band gap voltage reference power supply rejection rate (PSRR) low temperature coefficient
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参考文献6

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共引文献37

同被引文献20

  • 1李炜,蔡敏.一种电流求和型CMOS基准电流源[J].半导体技术,2005,30(11):60-63. 被引量:2
  • 2冯勇建,胡洪平.一种低功耗CMOS带隙基准电压源的实现[J].微电子学,2007,37(2):231-233. 被引量:16
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