基于遗传算法的逻辑电路测试生成的研究

Study on Automatic Test Generation for Logical Circuits Based on Geneticalgorithms

本文提出了一种基于遗传算法的逻辑电路测试生成算法,利用遗传算法的全局寻优特点进行集成电路的测试生成,并与确定性算法进行了比较,所得到的实验结果表明,遗传算法可以在比较小的测试矢量集下得到比较高的故障覆盖率,是一个有效的测试生产算法.

In this paper, an algorithm for test generation of logical circuits based on genetic algorithms is proposed. Genetic algorithms, which are good at finding global optima, are used to generate test vectors. The results are compared to conventional deterministic algorithms. The proposed algorithm can acquire higher fault coverage while generate fewer test vectors, which confirms the algorithm is effective.