摘要
分析了同步数字体系SDH中STM-1信号解复用出TU-12的过程,对该电路中各个功能模块的设计思路进行了详细分析,采用了并行化处理方式,重点讨论了支路净荷抽取处理和FIFO的使用,进而完成了STM-1/TU-12解复用电路的设计与实现,创新性地将并行化、净荷调整后抽取和FIFO缓存结合使用,用以简化电路的设计。最后,在ALTERA公司的EP1C6T144C8器件环境下上进行了验证。
In this paper, we analyze the de-multiplexing process of STM-1 to TU-12 in SDH. The design scheme of all functional modules is discussed in detail. By parallel processing method, tributary payload processing and FIFO is presented. Based on the analysis, we accomplish the design and implementation of STM-1 to TU-12 de-multiplexing circuit. In order to predigest the circuit, we colligate parallel,adjusted payload extractive and FIFO. Finally, the verification is performed on an EP1C6T144C8 FPGA of ALTERA.
出处
《光通信技术》
CSCD
北大核心
2007年第11期53-56,共4页
Optical Communication Technology
关键词
SDH
解复用
支路净荷处理
指针解释
FIFO
SDH
de-multiplexing
tributary payload processing
pointer interpretation
FIFO
