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一个低压高阶曲率补偿的CMOS带隙基准电压源的设计 被引量：2

A Low Voltage and Curvature Compensated CMOS Bandgap Reference
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摘要 运用带隙基准的基本原理，采用0．6μm的CMOS工艺，对一个低压高阶曲率补偿的高性能CMOS带隙基准电压源进行研究，并结合所提出电路给出了高阶曲率补偿的数学表达式。Cadence软件仿真结果显示：电源电压最低可为1．2V，在-20～100℃温度范围内，输出电压为0．6V，温度系数为9．1ppm／℃，即基准输出电压随温度变化不超过±0．1％。低频（f=1kHz）时PSRR为-78dB。在室温电源电压为1．2V时总功耗约为38μw。整个带隙基准电压源具有良好的综合性能。 Employing the rationale of BGR（bandgap reference voltage）and 0.6 μm CMOS technology,a curvature compensated CMOS bandgap circuit with low supply voltage is presented. Combined with the proposed circuit, the mathematical expression of curvature compensated is given. Simulated by Cadence, with the minimum supply voltage is 1.2 V, the circuit delivers an output voltage of 0. 6 V and achieves a temperature coefficient of 9. 1 ppm/℃ over [- 20 ℃, 100℃ and a power supply rejection ratio of -78 dB at 1 kHz and the total consumption is 38 FW. So the proposed BGR has a good performance.
作者 李娟 常昌远 李弦
机构地区 东南大学微电子中心 东南大学集成电路学院
出处 《现代电子技术》 2007年第22期169-171,共3页 Modern Electronics Technique
关键词 CMOS带隙基准电压源 高阶曲率补偿 低温度系数 低电源电压 CMOS bandgap reference voltage high order curvature - compensated low temperature coefficient low supply voltage
分类号 TN432 [电子电信—微电子学与固体电子学]
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参考文献8

  • 1Piero Malcovati,Franco Maloberti,Carlo Fiocchi,etal.Curvature-Compensate BiCMOS Bandgap with 1 V Supply Voltage[J].IEEE Journal of Solid-state Circuit,2001,36:1 076-1 081.
  • 2Malcovati P,Maloberti F.New Curvature-Compensation Technique for CMOS Bandgap Reference with Sub 1 V Operation[J].IEEE Solid-state Circuit,2001,36(7):1 076-1 081.
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  • 4Ka Nang Leung,Philip K T Mok,Chi Yat Leung.A 2 V 23 μA 5.3 ppm/℃ Curvature Compensated CMOS Bandgap Voltage Reference[J].IEEE Solid-state Circuits,2003,38(3):561 -564.
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  • 8Xiaokang Guan,Albert Wang,Akira Ishikawa,et al.A 3 V 110μW3.1 ppm/℃ Curvature Compensated CMOS Bandgap Reference.ISCAS,IEEE,2006:2 861-2 864.

同被引文献22

  • 1Liu W. Mosfet Models for Spice Simulation[M]. New York: John Wiley & Sons,2001.
  • 2Meijer G C, Sehmale P C, Zalinge K V. A New Curvature- corrected Bandgap Reference[J]. IEEE Solid - State Circuits, 1994,29(11):1 139- 1 143.
  • 3Philip E, Allen Douglas R Holherg. CMOS Analog Circuit Design [M]. Second Edition. Oxford University Press, 2002.
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  • 5John P Uyemura.超大规模集成电路与系统导论[M].北京:电子工业出版社,2006.
  • 6毕查德·拉扎维.模拟CMOS集成电路设计[M].西安:西安交通大学出版社,2004.165-196.
  • 7冯朝坤.无线通信模数转换器中基准源设计【D].电子科技大学,2010.
  • 8DILIMOT G, BREZEANU G, MITU F, et al. Program- mable low voltage bandgap reference CMOS compati- ble[C].Proceedings of the International Conference on Semiconductor, 2002, 2:73 - 376.
  • 9YANG SH M, YIN Y SH, DENG H H. Design of an outer-chip controllable and inner-chip adjustable voltage ref- erence[C]. Proceedings of the International Conference on Anti-counterfeiting, Security, Identification, 2010: 134-137.
  • 10BROKAW A E A simple three-terminal IC bandgap ref- erence [J]. IEEE Journal of Solid-State Circuits, Dec 1974(9): 388-393.

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现代电子技术
2007年 第22期

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