摘要
为了防止静电放电(ESD)引起静电击穿造成TFT-LCD不良,通过实际测试和PSpice模拟讨论了TFT-LCD在设计过程中,ESD回路设计的规则和容限,通过放电模型的建立,得出显示器分辨率的变化与ESD回路中TFT宽长比(W/L)的关系,确立了静电防止回路的设计方向、规则。模拟分析结果表明:扫描门电极(Horizontal)在分辨率为H1080时ESDW/L设计为38.9/7.4μm,在分辨率为H1200时ESDW/L设计为35.0/7.4μm,满足模拟条件;数据线电极(Vertical)在分辨率为V1600时ESDW/L设计为14.7/7.4μm,在分辨率为V1920时ESDW/L设计为12.2/7.4μm,满足模拟条件。同时,按照此结果,可以得出ESDTFT器件在信号电压±25V变动时,电流值大于±9.5μA;而TFTLCD实际工作电压(<±10V)远小于模拟工作电压(<±25V),实际工作电流值为3～5μA,也小于此电流值,因此验证此模拟结论可行。
The ESD （Electrostatic Discharge）is the most important factor considered in TFT-LCD design. It should be a big issue for yield if the ESD design mismatches the real condition of mass product line. The ESD design rule was optimized through the real test and simulations, with regard to the relativity of W/L ratio of ESD TFT and resolution. The simulations and analysis showed that the W/L ratio must be decreased after the resolution increased. For horizontal resolution, W/L=38.9/7.4 μm is fit for H1080 and W/L=35.0/7.4 μm is fit for H1200. For vertical resolution, the W/L= 14.7/7.4 μm is fit for V1600 and W/L=12.2/7.4 μm is fit for V1920.
出处
《液晶与显示》
CAS
CSCD
北大核心
2007年第5期611-616,共6页
Chinese Journal of Liquid Crystals and Displays
基金
北京市科委科技计划资助项目(No.D0306006000091
No.D0304002000021)
