摘要
介绍了一款32位SoC芯片中基于AMBA AHB总线接口的以太网IP核的设计。目前该IP核已通过RTL级测试与FPGA验证。通过性能测试,表明该以太网IP核能满足许多实际应用的需求。由于其具有标准的总线接口,因此完全可以作为一个可重用的IP核。
This paper introduces the design of Ethernet IP core with an AMBA AHB bus interface in a 32-bit SoC. The IP core has passed RTL level testing and FPGA verification. Performance testing proves that the IP core can meet the demands of many practical applications. The IP core is also reusable because of its standard bus interface.
出处
《计算机工程》
CAS
CSCD
北大核心
2007年第22期252-254,257,共4页
Computer Engineering
基金
江苏省科技成果转化专项基金资助项目(BA2004029)