摘要
针对目前通讯系统中数据高传输率和低误码率对于系统中各部分的较高要求,设计了一种采用谐波滤除电阻技术降低相位噪声和功耗的交叉耦合互补结构的VCO(压控振荡器)。采用Chartered 0.35μm CMOS工艺在Mentor Graphics Eldo-RF环境下对电路进行仿真设计,仿真结果表明此振荡器在1 mA工作电流下,在4.0 GHz处达到-118.4 dBc/Hz@1 MHz的相位噪声,功耗仅为1.83 mW,其性能满足当今射频通讯系统的基本要求。
According to the high data transfer rate and low bit error rate, and the higher demand for each part of the current communication system, a complementary cross-coupled VCO (voltage controlled oscillator) was designed with harmonic filtering resistor to reduce the phase noise and power dissipation, The circuit was simulated using 0,35 μm CMOS technology in Mentor Graphics Eldo-RF environment, the simulation results show that the phase noise of the oscillator can reach - 118,4 dBc/Hz@ 1MHz at 4.0 GHz, 1 mA, the power dissipation is only 1.83 mW, and the charactenistic satisfies the current basic requirements of the RF communications systems.
出处
《半导体技术》
CSCD
北大核心
2007年第12期1065-1068,共4页
Semiconductor Technology
基金
安徽省教育厅自然科学研究重点项目(2006kj012a)
安徽大学研究生创新计划资助项目(20073049)