摘要
数字匹配滤波器也称作数字相关器,文章介绍了数字匹配滤波器在FPGA上的实现方式,对于卫星通信等领域中要求的匹配长度较长而导致的器件消耗增大,讨论了资源优化的途径,并对比2种优化方式,给出了经改进后的逻辑复用的FIR结构;综合结果表明,该结构能有效地节省器件的消耗。
The implementation of the digital matched filter(DMF) by using the field programmable gate array(FPGA) is introduced. Methods for optimizing resource consumption caused by the increase in correlation length in satellite communication fields are discussed and an improved multiplexing FIR structure is proposed. The simulation result shows that this structure is effective in reducing resource occupation.
出处
《合肥工业大学学报(自然科学版)》
CAS
CSCD
北大核心
2007年第11期1412-1414,共3页
Journal of Hefei University of Technology:Natural Science
关键词
现场可编程门阵列
数字匹配滤波器
逻辑复用
field programmable gate array(FPGA)
digital matched filter
logic multiplexing