期刊文献+

基于DDR内存总线的高速网络接入技术 被引量:2

High-speed network access technology based on DDR memory bus
下载PDF
导出
摘要 在机群系统中,机群的互连网络性能对整个机群系统的性能有着至关重要的影响.机群系统要求互连网络具有高带宽、低延迟、高可靠等特性,传统的互连网络接入方法基本上基于PCI接口.本文提出了基于DDR DIMM内存总线的接入思想,采用可编程逻辑器件FPGA实现网络接口设计,通过直接读写内存方式提高并行接入带宽,并将部分通讯协议下载到网卡上以提高计算和通讯的速度.实测表明,在不包括上层协议的情况下,接口卡的数据接入带宽可达3120Mbps,给出了基于FPGA的实现方法,并用Xilinx Virtex-Ⅱ Pro-20 FPGA进行了仿真和验证. In cluster, the performance of an interconnection network exhibits significant effect on that of the whole cluster system. The interconnection network is required to possess the characteristics of high bandwidth, low delay and high reliability. Traditional interconnection network access technologies are almost based on the peripheral component interface (PCI). This paper proposed a design ideology of access based on DDR DIMM interface and presented a design of the network interface on FPGA. The access bandwidth could be increased by reading and writing memory directly. Parts of the communication protocols were downloaded into the network interface card (NIC) to improve the parallel of calculation and communication. Measurements indicate that excluding the upper layer protocol, the access bandwidth of the NIC can reach to 3120 Mbps. An implementation approach of the NIC for FPGA was put forward and was simulated on an XC2VP20 FPGA chip of Xilinx Corporation.
出处 《北京科技大学学报》 EI CAS CSCD 北大核心 2007年第11期1158-1162,共5页 Journal of University of Science and Technology Beijing
基金 中国科学院计算所知识创新工程"HPC-OG模拟系统及相关技术"研究项目(No20036040)
关键词 网络 高速互连 网络接口卡 DDR DIMM FPGA network high-speed interconnection network interface card DDR DIMM FPGA
  • 相关文献

参考文献7

  • 1张佩珩,安学军,高文学.面向机群互连网络的智能网卡设计[J].计算机工程与应用,2003,39(28):148-150. 被引量:4
  • 2井文才,田劲东,张珣,刘卫,周革,张以谟.用于机群系统的高速光互连网络接口卡设计[J].光电子.激光,2000,11(1):7-10. 被引量:11
  • 3李海峰,周革,井文才,李朝辉,邓玉秀,张以谟.具有路由功能的光纤链路接口卡在机群系统中的应用[J].天津大学学报(自然科学与工程技术版),2002,35(6):749-751. 被引量:3
  • 4Tanabe N,Hamada Y,Nakajo H,et al.A low latency high bandwidth network interface prototype for PC cluster∥Proceedings of the International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems.Big Island,2002:87
  • 5Tanabe N,Yamamoto J,Nishi H,et al.On-the-fly sending:a low latency high bandwidth message transfer mechanism∥Proceedings of the International Symposium on Parallel Architectures.Dallas,2000:186
  • 6JEDEC Standard.PC1600 and PC2100 DDR SDRAM Unbuffered DIMM Design Specification.Revision 1.1.[2000-12-15].http:∥download.micron.com/pdf/toolbox/184ddrunbrev1.1.pdf
  • 7Xilinx Inc.Xilinx Virtex:Ⅱ Pro Platform FPGA Complete Data Sheet.DS031 V3.4.[2005-03-01].http:∥www.xilinx.com/partinfo/ds031.pdf

二级参考文献8

  • 1井文才 周革 等.用于机群系统的光互连链路的设计与实现.99'全国光电子器件与集成技术会议论文集[M].深圳,1993.308-312.
  • 2Scalable Coherent Interface[S].IEEE Std 1596--1992,IEEE CS Press, 1993.
  • 3N J Boden et al.Myrinet:A Gigabit Per-Second Local-Area Network [J].IEEE Micro, 1995 ; 15( 1 ) :29-36.
  • 4Fabrizio Petrini,Wuchun Feng et al.The Quadrics Network:High- performance Clustering Technology[J].IEEE Micro,2002:46-57.
  • 5Intel Corporation.i960(r)VH Processor Developer's Manual.1998-10.
  • 6Kevin Skahill 朱明程等(译).可编程逻辑系统的VHDL设计技术[M].东南大学出版社,1998..
  • 7Panda D K,J Parallel Distributed Computing,1997年,40卷,1页
  • 8安学军,祝明发,高文学,吴冬冬.虫洞路由交换及其缓冲区设计[J].微电子学与计算机,2002,19(9):15-18. 被引量:4

共引文献15

同被引文献15

  • 1雷艳静,魏建军,王玥,吴延昌,康继昌.面向机群系统的高速光纤传输网络接口卡设计[J].计算机工程与应用,2006,42(13):19-21. 被引量:3
  • 2Liu Junrui,Chen Yingtu,Fan Xiaoya,and Kang Jichang.Research of the Direct Memory Communication Method[A].2009 WASE International Conference on Information Engingeering[C].2009,1:282-285,.
  • 3JEDEC.PC SDRAM Serial Presence Detect(SPD)Specification[S],Revision 1.2A:Page 4.1.2.4.1-Page 4.1.2.4.39.
  • 4雷艳静.信令寻径式光纤传输先锋交换网研究[D].西北工业大学计算机学院,2009.
  • 5JEDEC.PC2100 and PC1600 DDR SDRAM Registered DIMM Design Specification[S].January 2002,Revision 1.3:Page4.20.4.1-Page 4.20.4.82.
  • 6雷艳静.面向MNWF的信令寻径式光纤通道先锋交换网研究[D].西安:西北工业大学计算机学院,2009:14-32.
  • 7王乐,张晓彤,李磊,樊勇.Linux下的DDR DIMM总线接口设备检测方法[J].计算机工程,2007,33(18):256-258. 被引量:4
  • 8Budruk R, Anderson D,Shanley T. PCI Express System Archi tecture[M]. 北京:电子工业出版,2005.
  • 9Tanabe N, Hamada Y, Nakajo H. A low latency high bandwidth network interface prototype for PC cluster[C]//Proceedings of the International Workshop on Innovative Architecture for Fu- ture Generation High2Performance Processors and Systems. Big Island, 2002 : 87.
  • 10Matzigkeit G, Okuji Y K. The GUN Grub manual[OL], http:// www. gnu. org/software/grub/manual/grub, html.

引证文献2

二级引证文献2

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部