基于CPCI总线多DSP系统的高速主机接口设计

High-speed host interface design of multi-DSP system based on CPCI

CPCI总线是一种成熟全面的计算机总线,通过它主机可以方便地为DSP加载程序,进行调试和监控工作;另外还能在主机和DSP系统间完成高速数据传输工作。本文结合一个已经成功应用的设计,阐述了基于双状态机+Cache结构的主机接口设计,并给出了逻辑框图。利用PLX公司的PCI9656接口芯片,FPGA提供了高达90MB/s的主机访问DSP和SDRAM的速度。

CPCI is a powerful computer bus, which can be used to load DSP program, debug and monitor the DSP system by the host. in the other hand, it can be a high speed data transfering channel between host and DSP. Based on a successful applicated design, this paper shows a new structure host interface design： cache with two state machine controled, and its logic block. With the PCI interface chip, PCI9656, the FPGA supplies the speed as 90MB/s when host access the DSP and SDRAM on board.