基于VHDL/FPGA的PC总线接口电路设计方法

The design method of interface circuit of PC bus based on VHDL/FPGA

对多种总线结构进行了简单比较;分析了ISA总线的数据传输机制;基于VHDL语言设计了一个ISA总线接口电路,该接口电路具有16位的数字量输入/输出、16路模拟信号输入、4路16位D/A输出和一个64位的计数器输出等功能;给出了程序片段要点.用MAX+PLUSⅡ软件进行了仿真调试和FPGA器件下载测试,结果表明实现了ISA总线的要求.

Some kinds of PC buses were listed out for comparison. The data transmission mechanism of ISA bus was analyzed and the interface circuit was designed with VHDL, including functions of digital input/output of 16 bits, 16 lines analogue input, 4 lines D/A output of 16 bits and a 64 bits counter. Some parts of source programs were given out. The design was simulated in MAX ＋ PLUS Ⅱ tools and downloaded to a proper FPGA device. The result demonstrated that the demand of ISA bus was realized.