X处理器存储层次研究

Research on X Processor's Memory Hierarchy

随着计算机应用领域不断拓展,流媒体应用及科学计算正成为微处理器的一种重要负载。流媒体应用的特征是大量的数据并行、少量的数据重用以及每次访存带来的大量计算。因为带宽的限制,传统的微处理器结构很难满足这些特点。X处理器是一款流处理器,针对流应用特点,X处理器采用了新型的三级流式存储层次:局部寄存器文件、流寄存器文件和片外存储器,有效解决了带宽问题。本文在模拟平台采用了两种方法(RS码和测试程序)测试,验证了流存储层次解决带宽瓶颈的有效性,也证明了设计的正确性。

With the expanding area of computer application, stream media application and scientific computing are becoming an important kind of application of processor, Stream media applications are characterized by large amounts of available parallelism, little data reuse, and a high computation to memory access ratio, Because of limited global bandwidth, these characteristics are poorly matched to conventional microprocessor architectures. X processor is a stream architecture processor, The memory hierarchy of X processor which aims at releasing the problem of bandwidth of stream application efficiently is comprised of local register file, stream register file and off-chip DRAM. On the simulation platform, this paper implements two methods （ RS Code and simulation procedure）, it validates the efficiency of the stream memory hierarchy and proves the design.