摘要
通过仿真与实验设计出了一种高性能的双层多晶硅自对准PNP晶体管工艺流程,分析了关键工艺技术,器件性能达到fT=8.5 GHz,β=60,BVCEO=8 V。该工艺与已有的双层多晶硅自对准NPN晶体管工艺相兼容,可用于制造高性能的互补双极电路。
A high-performance double poly-silicon self-aligned PNP transistor process with .fT=8.5GHz,β-60 and BVCEO=8V is designed by simulations and experiments, and the key technologies are analyzed. The process is compatible to the existing double poly-silicon self-aligned NPN transistor process, which can be used to fabricale high-performance complementary bipolar circuits.
出处
《重庆邮电大学学报(自然科学版)》
2007年第6期669-673,共5页
Journal of Chongqing University of Posts and Telecommunications(Natural Science Edition)
关键词
双层多晶硅
自对准
PNP
互补双极
double poly-silicon
self-aligned
PNP
complementary bipolar