RFID芯片电源产生电路的优化设计

Optimization of the Power Generation Circuit of RFID Chip

目的解决对一种应用于RFID芯片上的电源产生电路容易发生闩锁效应并且输出电压波动较大的问题.方法提出了优化改进方案,解决了原电路存在的不足3采用0.6μmCMOS工艺,使用Hspice进行了仿真验证.结果仿真结果表明优化后的电路可以获得比较稳定的电源电压.结论性能比原来电路有较大改善。

Aim To solve the problecns of easy latch-up effect and unsteady output voltage in power generation circuit in RFID chip.Method Focusing on these problems and the design is optimized. Latch up effect has well been resolved.The optimized design is implemented with 0.6μm CMOS technology.Result The simulation result by Hspice shows that the new circuit can supply a steady voltage.Conclusion The performance is better than the oria, inal circuit.