一种电台纠错编码模块的改进

Improvement on a Radio Error-correcting Code Module

文中首先简单介绍了LDPC码的优点及其译码过程,然后在SystemGenerator环境中对整个编译码算法进行了参数化的FPGA实现,最后把LDPC编码模块应用于一种电台代替原来的纠错编码模块,并验证了系统的性能。

In this paper, LDPC （Low Density Parity Check） code, along with its merits and decoding process is briefly introduced. The entire coding and decoding algorithm is implemented by FPGA（Field Programmable Gate Array） with parameters in the simulation environment of SystemGenerator. The LDPC code module is applied in a certain radio to take the place of its original error-correcting code module, and simulation results verify the better performance of the new system.