摘要
本文应用限幅电压开关理论设计了两种主从型nMOS四值触发器。这砦触发器具有双端预置能力和双轨互补输出。通过采用JKLM型触发器对十六进制加法计数器和十进制加法计数器的设计实例证明了这些触发器能有效地用于四值时序电路的设计。
By using the theory of clipping voltage-switches, two kinds of master/slave nMOS quaternary flip-flops are designed.These flip-flops have the capability of two-input presetting and double-rail complementary outputs. A modulo-16 up counter and a modulo-10 up counter are designed by using JKLM type flip-flop. It is shown that these flip-flops can be flexibly used to design quaternary sequential circuits.
基金
宁波市科委青年科技基金
浙江省自然科学基金
关键词
开关理论
NMOS
四值逻辑
触发器
设计
Theory of clipping voltage-switches, nMOS, Quaternary logic, Flip-flops, Sequential circuit
