摘要
根据UHF射频识别的应用、结合提出的接收前端结构,对所需的射频前端中混频器线性度要求做出分析,给出了决定IP2、IP3值的因素。在不影响系统噪声性能的条件下,提出了基于共模信号反馈、复用补偿电流路径的IP2改进办法;源极负反馈,低输出阻抗的IP3改进办法。混频器采用UMC0.18μm RF CMOS工艺实现,在3.3 V供电、抽取8.7 mA电流条件下,采用带外线性度的测试办法,测得23个样品的IP3平均值为15 dBm;采用FIB断开校正电路的试验表明,混频器的IP2有明显的提升(从37 dBm到52 dBm)。
Requirements for mixer linearity performance, especially IP2 and IP3, in UHF RFID receiver frontend was concluded based on the analysis of application and direct conversion architecture. A novel down-conversion mixer without penalty of noise was presented. Common mode signal feedback and reuse of bleeding current path were proposed to improve IP2, and inductively degenerated common source transconductance stage and low conver- sion gain was used to achieve higher IP3. Implemented in UMC's 0.18/lm RF CMOS process, the mixer operated at 3.3 V single power and 8.7 mA current. An average IP3 for 23 samples was 15 dBm when fed by two fundamental signals at 600 kHz and 1.1 MHz offset from center frequency. Test results showed that IP2 was obviously boosted from 37 dBm (average of 5 samples) to 52 dBm (average of 23 samples).
出处
《微电子学》
CAS
CSCD
北大核心
2007年第6期771-775,共5页
Microelectronics
基金
上海市科学技术委员会基金资助项目(06SA14)