基于三值神经网络的数字电路多故障测试生成算法

Multiple Fault Testing Generation Algorithm Based Three-valued Neural Networks for Digital Circuits

针对数字电路中多故障测试生成较难的问题,提出了基于三值神经网络的数字电路多故障测试生成算法。该算法先把多故障转换成为单故障,再用三值神经网络的方法对单故障电路构造故障的约束网络,最后用遗传算法求解故障约束网络能量函数的最小值点获得原电路中多故障的测试矢量。在一些国际标准电路上的实验结果表明本算法的可行性。

A multiple faults testing generation algorithm based three- valued neural networks for digital circuits is proposed because the testing generation for multiple faults in digital circuits is more difficult. This algorithm change multiple faults into single fault firstly and constructs the constraint network of the fault for the single fault circuit with method of three - valued neural networks. The testing vectors for multiple faults in the original circuit can be obtained by solving the minimum of energy function of the constraint network for the fault with genetic algorithm. The experimental results on some international standard circuits demonstrate the feasibility of the algorithm.