多值图像连通域标记ASIC结构设计

Architecture Design of ASIC Used for Connected Components Labeling of Multi-value Image

提出了一种能够实时实现多值图像连通域标记算法的ASIC系统结构.该器件采用基于像素的图像连通域标记算法,通过分析存储器需求,减少了片内存储器容量,以及存储器访问所需要的时钟周期数,使图像标记的总时钟数降为N×M×4,N为图像行数,M为列数.仿真结果表明,ASIC能够满足大部分实时目标识别系统的要求.

An architecture of connected components labeling algorithm used for multi-value segmented image labeling is pro- posed in this paper. Algorithms adopted in this architecture is connected components labeling algorithm based on pixel. By ana- lyzing memory requirement, the in-chip memory capacity reduced, and clock cycles required by memory accessing are reduced either. Total clock cycles to process an image is N ＊ M ＊ 4, in which N is the row of the image and the M is the column of the image. Simulation results show that the ASIC based on the architecture can be used in many real-time pattern recognition systems.